{"title":"A sockets-based implementation of hardware and software co-design","authors":"A. Herbert","doi":"10.1109/IVC.1996.496021","DOIUrl":null,"url":null,"abstract":"The EDA community has provided the tools to automate and accelerate much of the IC design process. However, the development of large ICs still remains expensive and complex. One of the biggest development risks lies in the area of design completeness-that the design will not support all target applications. Design verification tends to be ad hoc, with engineers focusing on verifying the designed functionality with no systematic approach toward verifying all possible applications. This results in partial verification. Design oversights that escape to the IC's prototype stage add time and cost to the project. Clearly, a benefit will result from integration of the end user into the earliest parts of the design cycle. By enabling end users to explore the design space, a more robust design can be yielded.","PeriodicalId":330849,"journal":{"name":"Proceedings. IEEE International Verilog HDL Conference","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-03-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. IEEE International Verilog HDL Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IVC.1996.496021","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
The EDA community has provided the tools to automate and accelerate much of the IC design process. However, the development of large ICs still remains expensive and complex. One of the biggest development risks lies in the area of design completeness-that the design will not support all target applications. Design verification tends to be ad hoc, with engineers focusing on verifying the designed functionality with no systematic approach toward verifying all possible applications. This results in partial verification. Design oversights that escape to the IC's prototype stage add time and cost to the project. Clearly, a benefit will result from integration of the end user into the earliest parts of the design cycle. By enabling end users to explore the design space, a more robust design can be yielded.