A Scalable Image/Video Processing Platform with Open Source Design and Verification Environment

Abstract

This paper presents a scalable image/video processing platform on Field-Programmable Gate Array (FPGA), capable of capturing images via a low-cost OV7670 camera and in real time displaying the original, in-process, and final results of images on a VGA-interfaced monitor. To make the platform expandable and reusable, not only is the design with Verilog hardware description language (HDL) offered, but also the verification environment including six open verification components (OVCs) is provided. To the best of our knowledge, this proposed work costs the least FPGA resource (753 LUTs and 277 Register) compared to the existing open source implementations on the design of the Camera-FPGA-VGA data path. We make this platform publicly available to encourage future research projects on image/video processing, computer vision, machine learning, etc., and to serve educational studies on digital system design with Verilog HDL and FPGAs.