Low cost test architecture for mixed-signal integrated circuits

Abstract

Mixed-signal integrated circuit testability is a complex problem because test circuitry must satisfy conflicting constraints, such as low area and power meanwhile achieving reduced test time. This paper presents a complete solution that enhances the state of the art towards testability of mixed-signal circuits, based on a 3-pin interface. This solution encompasses an efficient low cost test architecture that enables structural and functional tests of mixed-signal circuits. Experimental results demonstrate the proposed architecture flexibility applied to applications with diverse test requirements.