A Simple Method of using the Die of an Integrated Circuit to Measure the Relative Humidity Inside its Encapsulation

R. Merrett, S. Sim, J. P. Bryant
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引用次数: 8

Abstract

A technique (the capacitance-ratio test) is described for assessing the water content of hermetic packages containing an integrated circuit die. It is based on a theoretical analysis which shows that the frequency dependence of the capacitance between a selected pair of IC metallisation tracks can be used to derive the moisture induced component of this capacitance. A measurement on an encapsulated integrated circuit die, held at a constant temperature, is used to determine the ratio of the moisture induced capacitance and the intrinsic capacitance between metallisation tracks. By comparing this ratio with that obtained from a sample of integrated circuits exposed to a known relative humidity, the test can indicate whether the relative humidity in the package is greater or less than a specified value. The accuracy of the test is comparable with that of other moisture sensing methods for encapsulations, and its sensitivity is adequate for the control of known moisture-related failure mechanisms in integrated circuits.
一种利用集成电路芯片测量封装内相对湿度的简易方法
描述了一种技术(电容比测试),用于评估包含集成电路芯片的密封封装的含水量。它基于理论分析,该分析表明,在所选的一对IC金属化轨道之间的电容的频率依赖性可以用来推导该电容的湿致分量。测量封装的集成电路芯片,保持在恒定温度下,用于确定金属化轨道之间的湿气感应电容和固有电容的比率。通过将该比率与暴露在已知相对湿度下的集成电路样品所获得的比率进行比较,测试可以指示封装中的相对湿度是大于还是小于规定值。该测试的准确性可与其他封装湿度传感方法相媲美,其灵敏度足以控制集成电路中已知的与湿度相关的故障机制。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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