Enhanced endurance of dual-bit SONOS NVM cells using the GIDL read method

Abstract

Gate-induced drain leakage (GIDL) current is demonstrated to be more sensitive to charge stored locally within the gate-dielectric stack, as compared with the transistor threshold voltage (VT). Thus the sensing of GIDL rather than VT is advantageous for dual-bit SONOS NVM cell read operation, not only because it mitigates the complementary-bit disturb (CBD) issue and hence facilitates gate-length scaling, but also because it allows for reductions in stored charge and hence lower program/erase voltages for improved endurance.