Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers Pub Date : 2014-06-09 DOI:10.1109/VLSIT.2014.6894344

P. Hashemi, K. Balakrishnan, A. Majumdar, A. Khakifirooz, Wanki Kim, A. Baraskar, L. Yang, Kevin K. H. Chan, S. Engelmann, J. Ott, D. Antoniadis, E. Leobandung, Dae-gyu Park

{"title":"Strained Si1−xGex-on-insulator PMOS FinFETs with excellent sub-threshold leakage, extremely-high short-channel performance and source injection velocity for 10nm node and beyond","authors":"P. Hashemi, K. Balakrishnan, A. Majumdar, A. Khakifirooz, Wanki Kim, A. Baraskar, L. Yang, Kevin K. H. Chan, S. Engelmann, J. Ott, D. Antoniadis, E. Leobandung, Dae-gyu Park","doi":"10.1109/VLSIT.2014.6894344","DOIUrl":null,"url":null,"abstract":"We demonstrate high performance (HP) s-SiGe pMOS finFETs with Ion/Ieff of ~1.05/0.52mA/μm and ~1.3/0.71mA/μm at Ioff=100nA/μm at VDD=0.8 and 1V, extremely high intrinsic performance and source injection velocity. Compared to earlier work, an optimized process flow and a novel interface passivation scheme, result in ~30% mobility enhancement and dramatic sub-threshold-swing reduction to 65mV/dec. We also demonstrate the most aggressively scaled s-SiGe finFET reported to date, with WFIN~8nm and LG~15nm, while maintaining high current drive and low leakage. With their very low GIDL-limited ID, min and more manufacturing-friendly process compared to high-Ge content SiGe devices, as well as impressive Ion~0.42mA/μm at Ioff =100nA/μm and gm, int as high as 2.4mS/μm at VDD=0.5V, s-SiGe finFETs are strong candidates for future HP and low-power applications.","PeriodicalId":105807,"journal":{"name":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","volume":"254 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-06-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.2014.6894344","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 15

Abstract

We demonstrate high performance (HP) s-SiGe pMOS finFETs with I_on/I_eff of ~1.05/0.52mA/μm and ~1.3/0.71mA/μm at I_off=100nA/μm at V_DD=0.8 and 1V, extremely high intrinsic performance and source injection velocity. Compared to earlier work, an optimized process flow and a novel interface passivation scheme, result in ~30% mobility enhancement and dramatic sub-threshold-swing reduction to 65mV/dec. We also demonstrate the most aggressively scaled s-SiGe finFET reported to date, with W_FIN~8nm and L_G~15nm, while maintaining high current drive and low leakage. With their very low GIDL-limited I_{D, min} and more manufacturing-friendly process compared to high-Ge content SiGe devices, as well as impressive I_on~0.42mA/μm at I_off =100nA/μm and g_{m, int} as high as 2.4mS/μm at V_DD=0.5V, s-SiGe finFETs are strong candidates for future HP and low-power applications.

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应变Si1−xGex-on-insulator PMOS finfet具有优异的亚阈值泄漏，极高的短通道性能和10nm及以上节点的源注入速度

我们展示了高性能(HP) s-SiGe pMOS finfet，在Ioff=100nA/μm, VDD=0.8和1V时，离子/Ieff分别为~1.05/0.52mA/μm和~1.3/0.71mA/μm，具有极高的本征性能和源注入速度。与早期的工作相比，优化的工艺流程和新的界面钝化方案使迁移率提高了约30%，并将亚阈值摆幅显著降低到65mV/dec。我们还展示了迄今为止报道的最大规模的s-SiGe finFET, WFIN~8nm和LG~15nm，同时保持了高电流驱动和低泄漏。与高ge含量的SiGe器件相比，s-SiGe finfet具有非常低的gidl限制ID, min和更易于制造的工艺，以及令人印象深刻的离子~0.42mA/μm在Ioff =100nA/μm和gm, int高达2.4mS/μm在VDD=0.5V, s-SiGe finfet是未来HP和低功耗应用的有力候选。

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来源期刊

2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers

CiteScore

3.40

自引率

0.00%

发文量