A shuffled iterative bit-interleaved coded modulation receiver for the DVB-T2 standard: Design, implementation and FPGA prototyping

Abstract

Rotated QAM constellations improve Bit-Interleaved Coded Modulation (BICM) performance over fading channels. Indeed, an increased diversity is obtained by coupling a constellation rotation with interleaving between the real and imaginary components of transmitted symbols either in time or frequency domain. Iterative processing at the receiver side can provide additional improvement in performance. In this paper, an efficient shuffled iterative receiver is investigated for the second generation of the terrestrial digital video broadcasting standard DVB-T2. Scheduling an efficient message passing algorithm with low latency between the demapper and the LDPC decoder represents the main contribution. The design and the FPGA prototyping of the resultant shuffled iterative BICM receiver are then described. Architecture complexity and measured performance validate the potential of iterative receiver as a practical and competitive solution for the DVB-T2 standard.