A circuit synthesis technique based on network determinant expansion

Abstract

In this paper we present a simple technique of analog electronic circuits synthesis by means of a linear representation. The approach is based on generalized parameter extraction method. It describes the procedure for developing the circuit topology both for passive or active circuits. The input data for the proposed synthesis method are the arbitrary network function approximated in polynomial form and specified elements set. In contrast to other synthesis approaches the proposed technique provides the realization of full set of equivalent circuits and allow to choose the best circuit solutions by various criteria. Experiments conducted on the low-pass filter design demonstrate the simplicity and effectiveness of synthesis method.