Test structures based VLSIC yield ramp maximization

Abstract

This paper addresses a new approach to yield learning of lead products in the most advanced technologies. We start by presenting the classification and evolution of yield loss mechanisms in the most recent and upcoming technology generations. Then we show a spectrum of yield loss characterization methods, from in-line to E-test to product test analysis. The main part of the paper is devoted to the presentation of specially designed test structures for the diagnosis of the dominant yield loss components such as random defects, and systematic and parametric effects.