{"title":"Development of MEMS based universal gate for signal processing circuit in low frequency sensor applications","authors":"S. Chakraborty, Tarun Kanti Bhattacharyya","doi":"10.1109/TECHSYM.2010.5469285","DOIUrl":null,"url":null,"abstract":"This paper presents the development of surface micro-machined universal gate for MEMS based digital logic implementation. The micro-cantilever switch, which is the fundamental building block of the design, has been optimized with analytical method and finite element method based simulation for three different specifications followed by system level simulation for performance analysis. The logic implementation of the simulated universal gates has been verified using different input combinations. It has also been shown that the same universal gate can be used as NOR as well as NAND gate by interchanging power supply and ground. The structures have been fabricated using standard surface micro-machining process.","PeriodicalId":262830,"journal":{"name":"2010 IEEE Students Technology Symposium (TechSym)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2010-04-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2010 IEEE Students Technology Symposium (TechSym)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TECHSYM.2010.5469285","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9
Abstract
This paper presents the development of surface micro-machined universal gate for MEMS based digital logic implementation. The micro-cantilever switch, which is the fundamental building block of the design, has been optimized with analytical method and finite element method based simulation for three different specifications followed by system level simulation for performance analysis. The logic implementation of the simulated universal gates has been verified using different input combinations. It has also been shown that the same universal gate can be used as NOR as well as NAND gate by interchanging power supply and ground. The structures have been fabricated using standard surface micro-machining process.