{"title":"10GHz clock distribution using coupled standing-wave oscillators","authors":"F. O’Mahony, C. Yue, M. Horowitz, S.S. Wong","doi":"10.1109/ISSCC.2003.1234369","DOIUrl":null,"url":null,"abstract":"A global clock network comprised of coupled, standing-wave oscillators is prototyped in a 0.18/spl mu/m 6M CMOS process. The clock network operates from 9.8 to 10.5 GHz with 0.6ps skew and contributes only 0.5ps jitter when referencing a clock source with 1.4ps rms jitter.","PeriodicalId":171288,"journal":{"name":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-02-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"41","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2003.1234369","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 41
Abstract
A global clock network comprised of coupled, standing-wave oscillators is prototyped in a 0.18/spl mu/m 6M CMOS process. The clock network operates from 9.8 to 10.5 GHz with 0.6ps skew and contributes only 0.5ps jitter when referencing a clock source with 1.4ps rms jitter.