ESD protection device issues for IC designs

Abstract

Electrostatic discharge (ESD) has been a major concern for IC chip quality. In this paper, the IC damage phenomena due to ESD and the protection techniques are reviewed. Also, the severe impact of the advanced process technologies on the ESD robustness, and the special circuit requirements that make the protection design even more challenging will be addressed. The recently developed simulation and modeling methods to improve the protection designs are also discussed.