A sub-1mA Highly Linear Inductorless Wideband LNA with Low IP3 sensitivity to Variability for IoT Applications

Abstract

This paper proposes a wideband 0.4-2 GHz cascode common-gate LNA that can be used as a building block for a noise canceling topology (which entails its noise to be canceled at the output node). The design strategy is to set the operating point by analyzing the third order coefficient $(\alpha_{3})$ of the output current and the output voltage, which is designed using a load composed by a diode-connected PMOS transistor and a resistor in parallel. This operating point allows a reasonable $V_{GS}$ spread, maintaining a high IIP3 which implies a low IIP3 sensitivity to process variability. The design strategy also achieves a current consumption under 1 mA and, depending on the technology node $V_{DD}$ (CMOS 130 nm in this case), it can consume under 1 mW of power. This makes the wideband LNA suitable for IoT applications. Monte Carlo simulations have been carried out to demonstrate the operating region sensitivity to variability and achieves a result of worst case $IIP3_{\mu}=+0.2\ \mathrm{dBm}$ with $\sigma=0.8\ \mathrm{dBm}$ (@2GHz) up to a nominal 2.75 dBm @900 MHz, $S_{11} < -23\ \mathrm{dB},\ \mathrm{NF} < 5.5\ \mathrm{dB}$ (canceled by virtue of its topology), a voltage gain of 11.6-14.6 dB ($S_{21}=6.4-9.4\ \mathrm{dB}$ with a buffer to $50\ \Omega$), and consuming just 1.19 mW from a 1.2 V supply.