A junction isolation technology for integrating silicon controlled rectifiers in crosspoint switching circuits

Abstract

An integrated circuit technology has been developed to fabricate a matrix array of 32 junction isolated Silicon Controlled Rectifiers (SCR) for telephone switching systems. Other integrated SCR arrays have employed the more complicated dielectric or air isolation technologies to eliminate parasitic substrate leakages. This leakage in junction isolated structures results from the collection of minority carriers by the substrate. Our technology employs a vertical pnpn structure similar to collector diffusion isolation (1) with a p-substrate, n+buried layer, p-epitaxy, wrap around n+isolation diffusion, implanted n-gate and diffused p+anode regions. Through the use of gold recombination centers for carrier lifetime reduction, the structure achieves substrate leakages of less than one part in 105. The SCRs also have adequately low leakages of typically 10 nA at 30V forward or reverse.