DC-to-5-GHz variable gain amplifier for high speed DSO

Yu-Lee Yen, C. Kuo, Ching-Feng Lee, Kevin Chen
{"title":"DC-to-5-GHz variable gain amplifier for high speed DSO","authors":"Yu-Lee Yen, C. Kuo, Ching-Feng Lee, Kevin Chen","doi":"10.1109/VLSI-DAT.2015.7114522","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a variable gain amplifier for the frontend circuitry of 5-GHz high-speed digital storage oscilloscopes. The design challenge includes wide bandwidth and low distortion over the frequency range from dc to 5 GHz. The Cherry-Hooper amplifier configuration is used to tackle the issue. The designed variable gain covers the specified range from -2 to 38 dB. The gain flatness carries out ripples less than 1 dB. To verify our approach, two versions of the amplifier circuits are fabricated. With four cascaded stages, the maximum gain achieves larger than 40 dB. The circuits are designed in 0.35 μm SiGe technology.","PeriodicalId":369130,"journal":{"name":"VLSI Design, Automation and Test(VLSI-DAT)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-04-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Design, Automation and Test(VLSI-DAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-DAT.2015.7114522","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This paper presents the design of a variable gain amplifier for the frontend circuitry of 5-GHz high-speed digital storage oscilloscopes. The design challenge includes wide bandwidth and low distortion over the frequency range from dc to 5 GHz. The Cherry-Hooper amplifier configuration is used to tackle the issue. The designed variable gain covers the specified range from -2 to 38 dB. The gain flatness carries out ripples less than 1 dB. To verify our approach, two versions of the amplifier circuits are fabricated. With four cascaded stages, the maximum gain achieves larger than 40 dB. The circuits are designed in 0.35 μm SiGe technology.
用于高速DSO的dc - 5ghz可变增益放大器
本文设计了一种用于5ghz高速数字存储示波器前端电路的可变增益放大器。设计挑战包括在直流到5ghz的频率范围内的宽带宽和低失真。Cherry-Hooper放大器配置用于解决这个问题。所设计的可变增益范围从-2到38db。增益平坦度产生的波纹小于1db。为了验证我们的方法,制作了两个版本的放大器电路。通过4级联,最大增益大于40db。电路采用0.35 μm SiGe工艺设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信