{"title":"Notice of Violation of IEEE Publication Principles9.75/10.6GHz SiGe PLL for LNB Satellite Front-Ends Using Half-Rate Oscillators","authors":"A. Maxim, M. Gheorghe, C. Turinici","doi":"10.1109/VLSIC.2006.1705302","DOIUrl":null,"url":null,"abstract":"A fully-integrated frequency synthesizer for DBS satellite front-ends was realized in a low cost 50GHz fT SiGe process. Two half-rate VCOs followed by Gilbert frequency doublers generate the 9.75/10.6 GHz LO signals with lower phase noise than a full-rate oscillator. The loop filter was integrated on-chip by using a passive feed-forward architecture, which provides a noiseless resistor multiplication","PeriodicalId":366835,"journal":{"name":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","volume":"107 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2006.1705302","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A fully-integrated frequency synthesizer for DBS satellite front-ends was realized in a low cost 50GHz fT SiGe process. Two half-rate VCOs followed by Gilbert frequency doublers generate the 9.75/10.6 GHz LO signals with lower phase noise than a full-rate oscillator. The loop filter was integrated on-chip by using a passive feed-forward architecture, which provides a noiseless resistor multiplication