A CMOS Low Distortion Fully Differential Power Amplifier With Double Nested Miller Compensation

ESSCIRC '92: Eighteenth European Solid-State Circuits conference Pub Date : 1992-09-01 DOI:10.1109/ESSCIRC.1992.5468254

S. Pernici, G. Nicollini, R. Castello

引用次数: 52

Abstract

A four stages fully-differential amplifier that uses a double nested Miller compensated structure to lower harmonic distortion is presented. With a single 5V supply power dissipation is 10mW and THD is ¿83dB for a 6Vpp differential output signal at 10kHz and a load of 50¿. With 8¿ load and 10kHz, 4Vpp output signal, THD is ¿68dB. The chip area is 1000mils2 in a 1.5¿ n-well CMOS technology.

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一种双嵌套米勒补偿的CMOS低失真全差分功率放大器

提出了一种采用双嵌套米勒补偿结构的四级全差动放大器，以降低谐波失真。单5V电源功耗为10mW, THD为83dB, 10kHz, 6Vpp差分输出信号，负载为50hz。负载8 khz，输出4Vpp, THD为68dB。芯片面积为1000mils2，采用1.5¿n-well CMOS技术。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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ESSCIRC '92: Eighteenth European Solid-State Circuits conference

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