Design rules for CMOS self checking circuits with parametric faults in the functional block

Abstract

The authors investigate the detection of parametric bridging and delay faults in the functional block of self checking circuits (SCCS). As far as these faults are concerned, classical definitions are shown to become ambiguous, because they are entirely based on logic considerations. Thus, new definitions are here proposed to take care of the analogic and dynamic effects of such faults and to ensure that they do not produce any problem at system level. Moreover, rules aimed at the design of self checking circuits with combinational functional blocks satisfying these conditions are proposed.