Yin Sun, Jianmin Zhang, Zhiping Yang, C. Hwang, Songping Wu
{"title":"Simulation Investigation on Acoustic Noise Caused by “Singing” Capacitors on Mobile Devices","authors":"Yin Sun, Jianmin Zhang, Zhiping Yang, C. Hwang, Songping Wu","doi":"10.1109/ISEMC.2019.8825205","DOIUrl":null,"url":null,"abstract":"Recently, the acoustic noise emanating from mobile devices becomes an important issue for user experience. The vibration of multilayer ceramic capacitors (MLCCs) mounted on printed circuit board (PCB) can transfer to the PCB and lead to acoustic noise. To mitigate singing cap acoustic noise, sometimes it has to trade off EMC/SI/PI performance during system design. So, simulation methodology is critical to predict critical acoustic issue and help design tradeoff. In this paper, a simulation methodology to provide design guideline for MLCC placement and PCB fixation with the aim to decrease board vibration is proposed. A finite element model of the multilayer PCB considering detailed copper/dielectric distribution of each layer is developed. Modal analysis is firstly performed to analyze the vibration characteristics of the bare PCB. Then the harmonic response of the board due to vibration excitation of MLCC is modeled. Based on the modal analysis result, the design guideline for MLCC placement and PCB fixation location can be established. The proposed guideline is validated through PCB harmonic response simulation.","PeriodicalId":137753,"journal":{"name":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","volume":"74 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 IEEE International Symposium on Electromagnetic Compatibility, Signal & Power Integrity (EMC+SIPI)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISEMC.2019.8825205","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
Recently, the acoustic noise emanating from mobile devices becomes an important issue for user experience. The vibration of multilayer ceramic capacitors (MLCCs) mounted on printed circuit board (PCB) can transfer to the PCB and lead to acoustic noise. To mitigate singing cap acoustic noise, sometimes it has to trade off EMC/SI/PI performance during system design. So, simulation methodology is critical to predict critical acoustic issue and help design tradeoff. In this paper, a simulation methodology to provide design guideline for MLCC placement and PCB fixation with the aim to decrease board vibration is proposed. A finite element model of the multilayer PCB considering detailed copper/dielectric distribution of each layer is developed. Modal analysis is firstly performed to analyze the vibration characteristics of the bare PCB. Then the harmonic response of the board due to vibration excitation of MLCC is modeled. Based on the modal analysis result, the design guideline for MLCC placement and PCB fixation location can be established. The proposed guideline is validated through PCB harmonic response simulation.