Co-Design of Highly Uniform ReRAM Arrays in 180nm CMOS Technology for Neuromorphic Systems

Abstract

This paper presents the co-implementation of resistive random access memory inside a 180nm CMOS chip for low-cost, energy-efficient neuromorphic hardware accelerators. Systematic evaluation of different TaOx-based ReRAM stacks was performed to derive the optimal ReRAM stack that shows high spatial and temporal uniformities without compromising CMOS back-end-of-line compatibility. Detailed comparison among six different ReRAM stacks can reduce power consumption by $\sim89$% and increase uniformity by $\sim66$% via proper material selection. The optimized ReRAM cells are directly integrated on standard CMOS foundry chips, enabling low-cost, high-yield integration with high energy efficiency, fast speeds, high uniformity, suitable for neuromorphic computing applications.