High-performance spiking neural net accelerators for embedded computer vision applications

J. K. Kim, Phil C. Knag, Thomas Chen, Chester Liu, Ching-En Lee, Zhengya Zhang
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引用次数: 0

Abstract

One key component in computer vision algorithms involves developing and identifying relevant features from raw data. In this work, we designed spiking recurrent neural net accelerators to implement a class of unsupervised machine learning algorithms known as sparse coding. The accelerators perform fast unsupervised learning of features, and extract sparse representations of inputs for low-power classification. Taking advantage of high sparsity, spiking neurons, and error tolerance, the compact accelerator chips are capable of processing images at several hundred megapixels per second, while dissipating less than 10 mW. The accelerators can be embedded in sensors as frontend processors for feature learning, encoding, and compression.
用于嵌入式计算机视觉应用的高性能峰值神经网络加速器
计算机视觉算法的一个关键组成部分涉及从原始数据中开发和识别相关特征。在这项工作中,我们设计了脉冲循环神经网络加速器来实现一类被称为稀疏编码的无监督机器学习算法。加速器执行特征的快速无监督学习,并提取输入的稀疏表示以进行低功耗分类。利用高稀疏性、尖峰神经元和容错性,紧凑的加速器芯片能够以每秒几亿像素的速度处理图像,而功耗低于10兆瓦。加速器可以作为前端处理器嵌入传感器中,用于特征学习、编码和压缩。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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