Fast Shape Optimization of Metallization Patterns for DMOS Based Driver

Abstract

This paper addresses the problem of optimizing metallization patterns of back-end connections for the DMOS based driver since the back-end connections trend to dominate the overall on-resistance Ron. We propose a heuristic algorithm to seek for better shapes for the patterns targeting at minimizing Ron and at balancing the current distribution. In order to speed up the analysis, the equivalent resistance network of the driver is modified by inserting ideal switches to keep the conductance matrix constant. Simulation on two drivers from industrial TEG data demonstrates that our algorithm can reduce Ron effectively by shaping metals appropriately within a given routing area.