A 3-mW, 270-Mbps, Clock-Edge Modulated Serial Link for Mobile Displays

Won-Jun Choe, Bong-Joon Lee, Jaeha Kim, D. Jeong, Gyudong Kim
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引用次数: 2

Abstract

In this paper, a single channel clock-edge modulated serial link for mobile display interface is presented. Clock edge modulation (CEM) enables all necessary signals between a graphic processor and a LCD timing controller to be transferred over a single, DC-balanced differential channel, thus greatly saving the power and costs of the existing parallel lines. A simple DLL-based CEM decoder is described that recovers the data with low power consumption and high jitter tolerance. The use of a voltage-mode driver and a single-side termination further reduces the power. A prototype CEM transceiver was implemented in a 0.18mum CMOS process and dissipates 3.12mW when operating at 270-Mb/s and 1.2V
用于移动显示器的3mw, 270-Mbps时钟边缘调制串行链路
本文提出了一种用于移动显示接口的单通道时钟边调制串行链路。时钟边缘调制(CEM)使图形处理器和LCD定时控制器之间的所有必要信号都可以通过单个直流平衡差分通道传输,从而大大节省了现有平行线的功率和成本。介绍了一种简单的基于dll的CEM解码器,该解码器具有低功耗和高抗抖动性能。电压模式驱动器和单侧终端的使用进一步降低了功率。原型CEM收发器采用0.18 μ m CMOS工艺,在270-Mb/s和1.2V下工作时功耗为3.12mW
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