CMOS X-band pole-converging triple-cascode LNA with low-noise and wideband performance

Abstract

A pole-converging X-band low-noise amplifier (LNA) using 130 nm CMOS technology is proposed. An on-chip pole-converging capacitor C_PC is added between the gate and drain node of the common-gate (CG) stage. The capacitor C_PC combines with a noise-reducing inductor L₁ to converge poles into the desired band, which results in a pole-converging effect and wideband performance. The proposed modified broadband simultaneous noise and input-matching technique is adopted in triple-cascode configuration to realize good input matching and a low noise figure (NF). Measurement results exhibit a flat maximum power gain of 17.6 dB from 8 to 12 GHz and a reverse isolation over 60 dB within the desired bandwidth along with an NF ranging from 1.5 to 3.6 dB. The LNA core dissipates 17 mW from 2.4 V supply, and the chip size occupies 1.1 × 0.9 mm² including all pads. The simulated and measured results show good agreement from 8 to 12 GHz.