PAFESD: Process algebras for electronic system designs

Abstract

In this paper, we review a number of process algebra based formalisms that can be used for the formal specification of electronic system designs. It should be of interest to architects, engineers and researchers from the electronic design community. This paper also covers various formal techniques (process algebra based) for analysis of electronic system designs. Furthermore, we devote some space in this paper to an brief introduction of two process algebraic theories/frameworks SystemCFL and PAFSV that can be regarded as the formal languages of SystemC and SystemVerilog respectively.