System-level design of IEEE1394 bus segment bridge

T. Onoye, Yukihiro Nakamura, A. Shigiya, K. Chikamura, K. Tsujino, T. Izumi, H. Yamamoto
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引用次数: 1

Abstract

A system simulation environment is constructed dedicatedly for IEEE1394 high-speed digital communication. In this environment, various network transactions inherent in communication systems are taken into account for system simulation, which is indispensable to enable IP (Intellectual Property)-based design of the systems. By using the proposed environment, system-level design of IEEE1394 link layer controller and bus segment bridge is achieved with great ability of network transactions as well as connectivities with physical layer chips. Functionalities of the designed bus segment bridge has been verified according to its FPGA implementation.
IEEE1394总线分段桥的系统级设计
构建了IEEE1394高速数字通信系统仿真环境。在这种环境下,考虑到通信系统中固有的各种网络事务进行系统仿真,这对于实现基于IP(知识产权)的系统设计是必不可少的。利用所提出的环境,实现了IEEE1394链路层控制器和总线段桥的系统级设计,具有很强的网络事务处理能力和与物理层芯片的连接能力。通过FPGA的实现,验证了所设计的总线段桥的功能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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