Effect of Power Supply Noise on SRAM Dynamic Stability

2007 IEEE Symposium on VLSI Circuits Pub Date : 2007-06-14 DOI:10.1109/VLSIC.2007.4342772

M. Khellah, D. Khalil, D. Somasekhar, Yehea Ismail, T. Karnik, Vivek De

引用次数: 33

Abstract

We present both simulation results and test-chip measurements on the effect of power supply noise on SRAM dynamic cell stability. Results indicate that to accurately capture the effect of supply droop on bit failure rate, not only the DC amplitude of the noise needs to be considered as commonly practiced, but also its phase and frequency.

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电源噪声对SRAM动态稳定性的影响

我们给出了电源噪声对SRAM动态单元稳定性影响的仿真结果和测试芯片测量结果。结果表明，为了准确地捕捉电源下垂对比特故障率的影响，不仅需要考虑噪声的直流幅值，还需要考虑其相位和频率。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

2007 IEEE Symposium on VLSI Circuits

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