{"title":"A 35,000-transistor chip VLSI echo canceler","authors":"Yen-Sun Chen, D. Duttweiler","doi":"10.1109/ISSCC.1980.1156035","DOIUrl":null,"url":null,"abstract":"A single-chip VLSI echo canceler fabricated in 5μ Si-gate enhancement NMOS technology will be discussed. The chip, containing 2704 bits of dynamic shift register and 3300 logic gates, measures 313 × 356 mils.","PeriodicalId":229101,"journal":{"name":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1980.1156035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A single-chip VLSI echo canceler fabricated in 5μ Si-gate enhancement NMOS technology will be discussed. The chip, containing 2704 bits of dynamic shift register and 3300 logic gates, measures 313 × 356 mils.