{"title":"LPDDR4X (3732 Mbps) DBI impact on SI/PI and power","authors":"Sunil R. Gupta","doi":"10.1109/EPEPS.2017.8329707","DOIUrl":null,"url":null,"abstract":"Co-SI/PI analysis of a LPDDR4X SoC-PoP DRAM system operating at 0.6V VDDQ and data rate of 3732 Mbps is presented, quantifying the impact of Data Bus Inversion (DBI) coding on signal and power integrity. DBI significantly mitigates Victim/Aggressor and SSN scenarios. Eye-aperture improvements observed can be ∼15% for an 80% Vic/Agg plus SSN pattern with-DBI. Additionally, VDDQ power savings due to DBI is summarized and can be ∼50% for a full-channel running a 100% SSN data pattern.","PeriodicalId":397179,"journal":{"name":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE 26th Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2017.8329707","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Co-SI/PI analysis of a LPDDR4X SoC-PoP DRAM system operating at 0.6V VDDQ and data rate of 3732 Mbps is presented, quantifying the impact of Data Bus Inversion (DBI) coding on signal and power integrity. DBI significantly mitigates Victim/Aggressor and SSN scenarios. Eye-aperture improvements observed can be ∼15% for an 80% Vic/Agg plus SSN pattern with-DBI. Additionally, VDDQ power savings due to DBI is summarized and can be ∼50% for a full-channel running a 100% SSN data pattern.