{"title":"A 1200×1200 8-Edges/Vertex FPGA-Based Motion-Planning Accelerator for Dual-Arm-Robot Manipulation Systems","authors":"Atsutake Kosuge, T. Oshima","doi":"10.1109/vlsicircuits18222.2020.9162951","DOIUrl":null,"url":null,"abstract":"An SoC-FPGA-based motion-planning accelerator operating on a graph with >10M edges is presented for the first time for dual-am-robot manipulation systems. The proposed modified A∗ algorithm with minimized memory access time, is further accelerated by extensive parallel computation and dynamic reconfigurations. The proposed accelerator has been verified by measurement result showing overall motion-planning time of 0.5 seconds, which is only 1/100 of the one by conventional algorithm on embedded CPU, while preserving accuracy.","PeriodicalId":252787,"journal":{"name":"2020 IEEE Symposium on VLSI Circuits","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsicircuits18222.2020.9162951","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
An SoC-FPGA-based motion-planning accelerator operating on a graph with >10M edges is presented for the first time for dual-am-robot manipulation systems. The proposed modified A∗ algorithm with minimized memory access time, is further accelerated by extensive parallel computation and dynamic reconfigurations. The proposed accelerator has been verified by measurement result showing overall motion-planning time of 0.5 seconds, which is only 1/100 of the one by conventional algorithm on embedded CPU, while preserving accuracy.