Multi-standard 5 Gbps to 28.2 Gbps adaptive, single voltage SerDes transceiver with analog FIR and 2-tap unrolled DFE in 28nm CMOS

Abstract

A low-power multi-standard transceiver in CMOS 28 nm is presented. The transceiver can be configured to cover the range from 5 Gbps to 28.2 Gbps. Both transmitter and receiver use a supply of 0.92 V. Transmitter uses a 3-tap Finite Impulse Response (FIR) filter and receiver uses a 3-tap analog FIR and 2-tap unrolled Decision Feedback Equalizer (DFE). The entire transceiver uses single level 0.92 V power supply with an analog power consumption of 242.3 mW at 28.2 Gbps. Total area of the transceiver including the Clock Synthesis Unit (CSU) is 0.88 mm2.