Thermometric decoders for high resolution digital-to-analog converters

Abstract

High-resolution digital-to-analog converters commonly employ segmented architecture. Its application requires thermometric decoder designing. This design process for high resolutions can become a challenge due to decoder complexity. In this paper, common design techniques of a thermometric decoder are discussed in details. The rule to form output logic functions is introduced. The formulas to calculate delay time and transistor number for thermometric decoders are presented. The simulation of 4-bit decoders has shown that a more complex design technique provides a decoder with a smaller number of transistors and delay time.