A 1Mb CMOS DRAM with design-for-test functions

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1986.1156947

J. Neal, B. Holland, S. Inoue, W. Loh, H. McAdams, Kenneth A. Poteet

引用次数: 13

Abstract

A mask programmable 1Mb CMOS DRAM family has been developed featuring design-for-test functions which allow the memory to reconfigured as an 8b parallel 128Kb organization to reduce test time. With a 1μm twin-well CMOS technology and a contactless trench cell, the chip measures 49mm2.

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具有专为测试而设计功能的1Mb CMOS DRAM

一个掩模可编程的1Mb CMOS DRAM系列已经开发出来，具有专为测试而设计的功能，允许内存重新配置为8b并行128Kb组织，以减少测试时间。该芯片采用1μm双孔CMOS技术和非接触式沟槽电池，尺寸为49mm2。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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