PNP bipolar structure design for low voltage 0.6 /spl mu/m complementary BiCMOS technology

M. Belaroussi, B. Djezzar, S. Mekhaldi
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Abstract

This paper describes simulation results of a vertical pnp bipolar structure design suitable for low voltage application which can be fabricated in BiCMOS technology. This study is carried out using a mixed two dimensional numerical device/circuit simulation program called CODECS. The simulations show that adding a medium performance pnp transistor, the performance of the complementary BiCMOS over conventional BiCMOS and CMOS were greatly improved as the supply voltage is lowered and the design rules is scaled down to 0.6 /spl mu/m.
PNP双极结构设计为低电压0.6 /spl mu/m互补BiCMOS技术
本文描述了一种适用于低电压应用的垂直pnp双极结构设计的仿真结果,该结构可以用BiCMOS技术制造。本研究是使用一个称为CODECS的混合二维数值器件/电路模拟程序进行的。仿真结果表明,随着电源电压的降低和设计规则的缩小到0.6 /spl mu/m,互补BiCMOS的性能比传统BiCMOS和CMOS有了很大的提高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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