{"title":"A Low Power FPGA Based Control Unit for an Implantatable Neuromodulation Circuit","authors":"Santiago Martínez, J. Oliver","doi":"10.1109/SPL.2019.8714506","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a FPGA based control unit for an implantable neuromodulation circuit. The design was validated at both logical and functional level and it was implemented in three different FPGA, from different families and manufacturers: 5CEBA4 (CycloneV family) by Intel, M2GL025 (IGL002 family) by Microsemi and HX-8K (iCE40 family) by Lattice. The design uses several parameterized constants such as output electrode number, therapy number and system clock frequency to create different sort of instances at synthesis time. For a given configuration with 4 therapies and 16 electrodes the design required less than 3900 logic elements. For that configuration the FPGAs total core power consumption was measured at 37°C and 7.8 MHz. The results were as low as 3.6 mW when delivering a continuous stimulation burst at a frequency of 10 kHz.","PeriodicalId":161898,"journal":{"name":"2019 X Southern Conference on Programmable Logic (SPL)","volume":"65 3","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 X Southern Conference on Programmable Logic (SPL)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SPL.2019.8714506","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
This paper presents the design of a FPGA based control unit for an implantable neuromodulation circuit. The design was validated at both logical and functional level and it was implemented in three different FPGA, from different families and manufacturers: 5CEBA4 (CycloneV family) by Intel, M2GL025 (IGL002 family) by Microsemi and HX-8K (iCE40 family) by Lattice. The design uses several parameterized constants such as output electrode number, therapy number and system clock frequency to create different sort of instances at synthesis time. For a given configuration with 4 therapies and 16 electrodes the design required less than 3900 logic elements. For that configuration the FPGAs total core power consumption was measured at 37°C and 7.8 MHz. The results were as low as 3.6 mW when delivering a continuous stimulation burst at a frequency of 10 kHz.