{"title":"1 Gbit/s bidirectional full-wire rate communication LSI for residential gateways","authors":"Yukikuni Nishidat, Kenji Kawait, Keiichi Koiket, Katsuichi Oyamat, Tetsuo Hayashi, Hiroyuki Nouchi","doi":"10.1109/VLSIC.2007.4342689","DOIUrl":null,"url":null,"abstract":"A communication LSI for residential gateways has been developed. The LSI has an inline-IPsec circuit, which achieves 1 Gbit/s performance for both encryption and decryption, a small-scale high-speed look-up circuit in which only comparators are made parallel, and a hierarchical and reconfigurable QoS circuit. A 2 Gbit/s full wire rate throughput was achieved at a power consumption of 2 W.","PeriodicalId":261092,"journal":{"name":"2007 IEEE Symposium on VLSI Circuits","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Symposium on VLSI Circuits","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2007.4342689","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
A communication LSI for residential gateways has been developed. The LSI has an inline-IPsec circuit, which achieves 1 Gbit/s performance for both encryption and decryption, a small-scale high-speed look-up circuit in which only comparators are made parallel, and a hierarchical and reconfigurable QoS circuit. A 2 Gbit/s full wire rate throughput was achieved at a power consumption of 2 W.