Sensing circuit optimization using different type of transistors for deep submicron STT-RAM

Abstract

In this paper, we propose an optimal combination of transistor types in the conventional sensing circuit. A sensing margin, which determines the read yield of STT-RAM, is sensitive to the Vth type of several transistors in the sensing circuit. Thus, the optimization of the sensing circuit using different types of transistors is important for designing the sensing circuit in STT-RAM. Using industry compatible 45-nm model parameters, Monte Carlo HSPICE simulation results show that the conventional sensing circuit optimized using different types of transistors achieves read access pass yield enhancement of 10% when compared to the conventional sensing circuit using typical transistors.