A System-level Design Method for Cognitive Radio on a Reconfigurable Multi-processor Architecture

Abstract

The future trend of software defined radio (SDR) platforms moves toward reconfigurable Multiprocessor System-on-Chips (MPSoCs). However, there is a gap between the modelling of the dynamic radio applications and the optimized implementation of the application on reconfigurable multiprocessor architectures. We aim to close this gap by applying a system level design method for the modelling and implementation of the applications on an MPSoC. The state-of-the-art radio technology based on SDR, Cognitive Radio, is considered as a design case to demonstrate the effectiveness of this method.