A post processing method for reducing substrate coupling in mixed-signal integrated circuits

P. Basedau, Qiuting Huang
{"title":"A post processing method for reducing substrate coupling in mixed-signal integrated circuits","authors":"P. Basedau, Qiuting Huang","doi":"10.1109/VLSIC.1995.520679","DOIUrl":null,"url":null,"abstract":"Due to the heavily doped substrate material in modern MOS technologies, digital interference couples to sensitive analog nodes much more easily than in technologies with p/sup -/ substrates. The guard ring method of isolating sensitive nodes is no longer as effective as before. In this contribution we investigate the isolation of analog circuits by etching a gap between analog and digital circuits from the back of the wafer. Experiments show that interference coupling 35 dB above noise floor is completely removed when a gap is etched around the analog circuit.","PeriodicalId":256846,"journal":{"name":"Digest of Technical Papers., Symposium on VLSI Circuits.","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-06-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Digest of Technical Papers., Symposium on VLSI Circuits.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.1995.520679","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 15

Abstract

Due to the heavily doped substrate material in modern MOS technologies, digital interference couples to sensitive analog nodes much more easily than in technologies with p/sup -/ substrates. The guard ring method of isolating sensitive nodes is no longer as effective as before. In this contribution we investigate the isolation of analog circuits by etching a gap between analog and digital circuits from the back of the wafer. Experiments show that interference coupling 35 dB above noise floor is completely removed when a gap is etched around the analog circuit.
一种用于减少混合信号集成电路中衬底耦合的后处理方法
由于现代MOS技术中衬底材料的大量掺杂,数字干扰比p/sup /衬底技术更容易耦合到敏感的模拟节点。隔离敏感节点的保护环方法不再像以前那样有效。在这篇文章中,我们通过从晶圆背面蚀刻模拟电路和数字电路之间的间隙来研究模拟电路的隔离。实验表明,在模拟电路周围蚀刻间隙,可以完全消除噪声底以上35db的干扰耦合。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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