{"title":"Additional Miniaturization of Directional Couplers","authors":"D. Letavin","doi":"10.1109/TELFOR56187.2022.9983701","DOIUrl":null,"url":null,"abstract":"A technique for increasing the degree of miniaturization of microstrip directional couplers is described, provided that the initially unused area inside the device is fully utilized. At the same time, from the side of the metallized surface under the capacitive elements of the low-pass filters, cavities are made with a depth not exceeding the thickness of the substrate, while the walls of the cavities have a metallized layer. This makes it possible to reduce the thickness of the substrate under the capacitive elements and thereby increase the capacitance rating for the same element area on the printed circuit board. This approach makes it possible in some cases to avoid the use of multilayer printed circuit boards, which simplifies the design of the device.","PeriodicalId":277553,"journal":{"name":"2022 30th Telecommunications Forum (TELFOR)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 30th Telecommunications Forum (TELFOR)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/TELFOR56187.2022.9983701","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A technique for increasing the degree of miniaturization of microstrip directional couplers is described, provided that the initially unused area inside the device is fully utilized. At the same time, from the side of the metallized surface under the capacitive elements of the low-pass filters, cavities are made with a depth not exceeding the thickness of the substrate, while the walls of the cavities have a metallized layer. This makes it possible to reduce the thickness of the substrate under the capacitive elements and thereby increase the capacitance rating for the same element area on the printed circuit board. This approach makes it possible in some cases to avoid the use of multilayer printed circuit boards, which simplifies the design of the device.