A Impact of Block Oxide on 50 nm Gate Length Planar MOSFETs

Abstract

In this paper, a new field-effect transistor (FET), silicon on partial insulator with block oxide (bSPI), is presented. To fabricate this novel device architecture, a sidewall spacer process is also exploited. For bSPIFET, this block oxide can block the most parts of the p-n junction between the substrate and the source/drain (S/D) region; thus, the junction leakage current is reduced dramatically. Likewise, thanks to the electric field between the body and the S/D region is isolated by the block oxide, the ultra-short-channel effects (USCEs) is also suppressed. In other words, the excellent device properties of the bSPIFET can be achieved, such as reduced drain-induced barrier lowering (DIBL), ultra low leakage (ULL), ideal subthreshold swing (SS), high drain output resistance and increase in the breakdown voltage. Moreover, owing to that the body of the bSPIFET device is bound to the substrate, both the floating-body effects (FBEs) and the self-heating effects (SHEs) are overcome simultaneously