{"title":"A 8 Gbps blind oversampling CDR with frequency offset compensation over infinite burst","authors":"Abhishek Chowdhary, Alok Kaushik, Sajal Kumar Mandal, S. Chopra, Tapas Nandy, Vivek Uppal","doi":"10.1109/ESSCIRC.2014.6942117","DOIUrl":null,"url":null,"abstract":"This paper presents a 8 Gbps high jitter tolerance (JTOL) corner-frequency hybrid CDR that employs blind oversampling phase detector in conjunction with digital proportional integral controller (PIC) for phase/frequency tracking with +/-4000ppm frequency offset compensation over infinite burst. Need of the elasticity buffer has been obviated by using a method of time-varying divider ratios in word-clock generation. Analytical treatment of the CDR dynamics and insight into its JTOL are also presented. Short lock time and tracking over infinite burst make this CDR reusable across applications requiring either burst or continuous mode support. The device exhibits a JTOL corner-frequency of 50MHz and total jitter tolerance floor of 0.52 UI peak-to-peak @ BER of 10-10 in 28nm CMOS technology with 1.0V supply.","PeriodicalId":202377,"journal":{"name":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","volume":"196 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2014 - 40th European Solid State Circuits Conference (ESSCIRC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2014.6942117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper presents a 8 Gbps high jitter tolerance (JTOL) corner-frequency hybrid CDR that employs blind oversampling phase detector in conjunction with digital proportional integral controller (PIC) for phase/frequency tracking with +/-4000ppm frequency offset compensation over infinite burst. Need of the elasticity buffer has been obviated by using a method of time-varying divider ratios in word-clock generation. Analytical treatment of the CDR dynamics and insight into its JTOL are also presented. Short lock time and tracking over infinite burst make this CDR reusable across applications requiring either burst or continuous mode support. The device exhibits a JTOL corner-frequency of 50MHz and total jitter tolerance floor of 0.52 UI peak-to-peak @ BER of 10-10 in 28nm CMOS technology with 1.0V supply.