{"title":"Temperature and scaling behavior of Strained-Si N-MOSFETs","authors":"J. Weise, J. Hoyt, J. Gibbons","doi":"10.1109/DRC.1993.1009565","DOIUrl":null,"url":null,"abstract":"Summary form only given. The device characteristics of N-MOSFETs fabricated in strained-Si have been investigated as a function of temperature and gate length. It is found that the low field mobility is enhanced compared to Si control devices at temperatures down at 20 K. For moderate fields, g/sub m/ is enhanced at all measured temperatures, for effective gate lengths down to 0.8 mu m (L/sub drawn/=1.5 mu m). At high power density, however, the devices exhibit a negative differential output resistance. The thermal conductivity of the relaxed Si/sub 1-x/Ge/sub x/ buffer layers is estimated by fitting polysilicon resistor characteristics to a first order model. >","PeriodicalId":310841,"journal":{"name":"51st Annual Device Research Conference","volume":"61 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-06-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"51st Annual Device Research Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DRC.1993.1009565","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
Summary form only given. The device characteristics of N-MOSFETs fabricated in strained-Si have been investigated as a function of temperature and gate length. It is found that the low field mobility is enhanced compared to Si control devices at temperatures down at 20 K. For moderate fields, g/sub m/ is enhanced at all measured temperatures, for effective gate lengths down to 0.8 mu m (L/sub drawn/=1.5 mu m). At high power density, however, the devices exhibit a negative differential output resistance. The thermal conductivity of the relaxed Si/sub 1-x/Ge/sub x/ buffer layers is estimated by fitting polysilicon resistor characteristics to a first order model. >