Scattered refresh: An alternative refresh mechanism to reduce refresh cycle time

Abstract

With realization of high density DRAM devices, the amount of time spent in refreshing a DRAM bank is increasing. This reduces the availability of the bank to the requests from the processing cores, leading to degradation in performance. In this work we target to reduce the refresh cycle time of the DRAM device by scattering the rows in a refresh operation to different subarrays and leveraging the available parallelism in their access. Considering 8Gb devices, we show that Scattered Refresh achieves up to 10.2% of overall system performance improvement. Scattered Refresh, being orthogonal to the existing refresh handling techniques, can be employed along with any of them, boosting their effectiveness further.