Development of a sCMOS Interoperable Process Design Kit and an open set of standard digital cells

Abstract

An Interoperable Process Design Kit (iPDK) was developed for the scalable CMOS process SCN3ME provided by ON Semiconductors, reachable across MOSIS. It includes DRC and LVS rules, SPICE models, technology files, verification and extraction files, execution scripts, symbol library and parametric cells (PCells). Then, using the iPDK, a set of standard digital cells were developed. A test chip was designed and fabricated. Measurements results are presented.