Digital to analog conversion performed in single electron technology

C. Lageweg, S. Cotofana, S. Vassiliadis
{"title":"Digital to analog conversion performed in single electron technology","authors":"C. Lageweg, S. Cotofana, S. Vassiliadis","doi":"10.1109/NANO.2001.966402","DOIUrl":null,"url":null,"abstract":"Investigates SET devices from the logic design perspective, using the SET tunnel junction's ability to control the transport of individual electrons. We introduce a modified turnstile circuit with clock and enable control signals, which has built-in memory and reset functionality. Using the modified turnstile circuit as a building block, we propose a scheme for an n-input digital to analog converter. We demonstrate the scheme by implementing and simulating a 3-bit digital to analog converter.","PeriodicalId":111348,"journal":{"name":"Proceedings of the 2001 1st IEEE Conference on Nanotechnology. IEEE-NANO 2001 (Cat. No.01EX516)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2001 1st IEEE Conference on Nanotechnology. IEEE-NANO 2001 (Cat. No.01EX516)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2001.966402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19

Abstract

Investigates SET devices from the logic design perspective, using the SET tunnel junction's ability to control the transport of individual electrons. We introduce a modified turnstile circuit with clock and enable control signals, which has built-in memory and reset functionality. Using the modified turnstile circuit as a building block, we propose a scheme for an n-input digital to analog converter. We demonstrate the scheme by implementing and simulating a 3-bit digital to analog converter.
在单电子技术中进行数模转换
从逻辑设计的角度研究SET器件,利用SET隧道结控制单个电子输运的能力。我们介绍了一种改进的带有时钟和使能控制信号的旋转门电路,它具有内置记忆和复位功能。以改进的旋转门电路为基础,提出了一种n输入数模转换器的方案。我们通过实现和模拟一个3位数模转换器来演示该方案。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信
小红书