{"title":"Digital to analog conversion performed in single electron technology","authors":"C. Lageweg, S. Cotofana, S. Vassiliadis","doi":"10.1109/NANO.2001.966402","DOIUrl":null,"url":null,"abstract":"Investigates SET devices from the logic design perspective, using the SET tunnel junction's ability to control the transport of individual electrons. We introduce a modified turnstile circuit with clock and enable control signals, which has built-in memory and reset functionality. Using the modified turnstile circuit as a building block, we propose a scheme for an n-input digital to analog converter. We demonstrate the scheme by implementing and simulating a 3-bit digital to analog converter.","PeriodicalId":111348,"journal":{"name":"Proceedings of the 2001 1st IEEE Conference on Nanotechnology. IEEE-NANO 2001 (Cat. No.01EX516)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2001-10-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2001 1st IEEE Conference on Nanotechnology. IEEE-NANO 2001 (Cat. No.01EX516)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NANO.2001.966402","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
Abstract
Investigates SET devices from the logic design perspective, using the SET tunnel junction's ability to control the transport of individual electrons. We introduce a modified turnstile circuit with clock and enable control signals, which has built-in memory and reset functionality. Using the modified turnstile circuit as a building block, we propose a scheme for an n-input digital to analog converter. We demonstrate the scheme by implementing and simulating a 3-bit digital to analog converter.