{"title":"A 0.4V 280-nW frequency reference-less nearly all-digital hybrid domain temperature sensor","authors":"Wenfeng Zhao, Rui Pan, Yajun Ha, Zhi Yang","doi":"10.1109/ASSCC.2014.7008920","DOIUrl":null,"url":null,"abstract":"This paper presents a subthreshold frequency reference-less temperature sensor. Compared with the previous designs that rely on external frequency references or excessive analog blocks, this work proposes a novel subthreshold ratioed-current/delay sensor core and hybrid-domain all-digital processing technique, which eliminates the dependence on frequency reference and is scalable to technology feature size. Our sensor has been fabricated in a 65-nm CMOS process and occupies a total area of 0.022mm2. Measurement results from 8 test chips have shown that the maximum inaccuracy is -1.6oC/+1oC across 0oC to 100oC with power consumption of 280-nW at 0.4V.","PeriodicalId":161031,"journal":{"name":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"48 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2014.7008920","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12
Abstract
This paper presents a subthreshold frequency reference-less temperature sensor. Compared with the previous designs that rely on external frequency references or excessive analog blocks, this work proposes a novel subthreshold ratioed-current/delay sensor core and hybrid-domain all-digital processing technique, which eliminates the dependence on frequency reference and is scalable to technology feature size. Our sensor has been fabricated in a 65-nm CMOS process and occupies a total area of 0.022mm2. Measurement results from 8 test chips have shown that the maximum inaccuracy is -1.6oC/+1oC across 0oC to 100oC with power consumption of 280-nW at 0.4V.