{"title":"Thermal protection of an 80V silicon-on-insulator LDMOS transistor for power-over-Ethernet applications","authors":"A. Hastings, S. Maramreddy, M. Patoka","doi":"10.1109/ISPSD.2005.1487970","DOIUrl":null,"url":null,"abstract":"This paper describes thermal protection for the pass transistor of a power-over-Ethernet powered device controller developed on a bonded-wafer silicon-on-insulator process. The 1/spl Omega/, 80V LDMOS transistor dissipates up to 8W during a typical fault condition. Current limiting, tightly coupled over-temperature sensing, and drain-to-source voltage sensing combine to limit measured peak junction temperatures to less than 250/spl deg/C.","PeriodicalId":154808,"journal":{"name":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","volume":"184 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings. ISPSD '05. The 17th International Symposium on Power Semiconductor Devices and ICs, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.2005.1487970","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper describes thermal protection for the pass transistor of a power-over-Ethernet powered device controller developed on a bonded-wafer silicon-on-insulator process. The 1/spl Omega/, 80V LDMOS transistor dissipates up to 8W during a typical fault condition. Current limiting, tightly coupled over-temperature sensing, and drain-to-source voltage sensing combine to limit measured peak junction temperatures to less than 250/spl deg/C.