Study of the programming sequence induced back-pattern effect in split-page 3D vertical-gate (VG) NAND flash

Abstract

For the first time the programming sequence induced array back-pattern effect is studied in a fully integrated split-page 3D vertical gate (VG) NAND Flash test chip. It is found that when programming of WL's starts from the source side it shows a wider programmed Vt (PV) distribution. It is clarified that when many WL's are programmed in the NAND string, the array loading resistance greatly increases, leading to the Vth shift for the earlier-programmed cells which is called the back-pattern effect. Our model indicates that the major mechanism comes from the decreased virtual drain potential of the selected WL when drain-side other WL's are programmed. In order to overcome the back-pattern effect, we propose a “by-page” programming method, where every page is programmed from drain (BL) side toward source side. It shows great improvements in PV distribution.