Optical wafer level mapping for MMIC processing

Abstract

There is a growing need for rapid non-destructive mapping of defects and polishing damage in semi-insulating GaAs wafers used in the efficient manufacture of microwave and millimeter wave monolithic integrated circuits (MMICs). Optical mapping by spatially resolved photoluminescence (SRPL) of whole wafers with high spatial resolution has been demonstrated. Video rate SRPL scans reveal dislocations, arsenic precipitates, and scratch-like defects in GaAs wafers. Considerable variations in defect densities are seen in material from different sources. This paper studies the relationship between wafer level optical maps and device parameters in order to determine the impact of the various defects.